17.5.5 UARTx Baud Rate Register Low

Name:	UxBRG
Offset:	0x240, 0x268, 0xF08


Bit	15	14	13	12	11	10	9	8
	BRG[15:8]
Access	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset	0	0	0	0	0	0	0	0


Bit	7	6	5	4	3	2	1	0
	BRG[7:0]
Access	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset	0	0	0	0	0	0	0	0

Bits 15:0 – BRG[15:0] Baud Rate Divisor bits

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