30.2.1 FSEC Configuration Register
Legend: PO = Program Once bit
| Name: | FSEC |
| Offset: | 0x000 |
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| Access | |||||||||
| Reset |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| AIVTDIS | CSS[2:0] | CWRP | |||||||
| Access | R/PO | R/PO | R/PO | R/PO | R/PO | ||||
| Reset | 1 | 1 | 1 | 1 | 1 | ||||
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| GSS[1:0] | GWRP | BSEN | BSS[1:0] | BWRP | |||||
| Access | R/PO | R/PO | R/PO | R/PO | R/PO | R/PO | R/PO | ||
| Reset | 1 | 1 | 1 | 1 | 1 | 1 | 1 | ||
Bit 15 – AIVTDIS Alternate Interrupt Vector Table Disable bit
| Value | Description |
|---|---|
1 |
Disables AIVT |
0 |
Enables AIVT |
Bits 11:9 – CSS[2:0] Configuration Segment Code Flash Protection Level bits
| Value | Description |
|---|---|
111 |
No protection (other than CWRP write protection) |
110 |
Standard security |
10x |
Enhanced security |
0xx |
High security |
Bit 8 – CWRP Configuration Segment Write-Protect bit
| Value | Description |
|---|---|
1 |
Configuration Segment is not write-protected |
0 |
Configuration Segment is write-protected |
Bits 7:6 – GSS[1:0] General Segment Code Flash Protection Level bits
| Value | Description |
|---|---|
11 |
No protection (other than GWRP write protection) |
10 |
Standard security |
0x |
High security |
Bit 5 – GWRP General Segment Write-Protect bit
| Value | Description |
|---|---|
1 |
User program memory is not write-protected |
0 |
User program memory is write-protected |
Bit 3 – BSEN Boot Segment Control bit
| Value | Description |
|---|---|
1 |
No Boot Segment |
0 |
Boot Segment size is determined by BSLIM[12:0] |
Bits 2:1 – BSS[1:0] Boot Segment Code Flash Protection Level bits
| Value | Description |
|---|---|
11 |
No protection (other than BWRP write protection) |
10 |
Standard security |
0x |
High security |
Bit 0 – BWRP Boot Segment Write-Protect bit
| Value | Description |
|---|---|
1 |
User program memory is not write-protected |
0 |
User program memory is write-protected |