15.4.3 DAC Control 2 High Register

Note:

The value for SSTIME[9:0] should be greater than the TMODTIME[9:0] value.

Name:	DACCTRL2H
Offset:	0xC4E


Bit	15	14	13	12	11	10	9	8
							SSTIME[9:0]
Access							R/W	R/W
Reset							0	0


Bit	7	6	5	4	3	2	1	0
	SSTIME[9:0]
Access	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset	0	0	0	0	0	0	0	0

Bits 9:0 – SSTIME[9:0] Time from Start of Transition Mode until Steady-State Filter is Enabled bits⁽¹⁾

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15.4.3 DAC Control 2 High Register

Bits 9:0 – SSTIME[9:0] Time from Start of Transition Mode until Steady-State Filter is Enabled bits(1)

Bits 9:0 – SSTIME[9:0] Time from Start of Transition Mode until Steady-State Filter is Enabled bits⁽¹⁾