3.10.7.5.1.10 T4CNTH – Timer4
Counter Register High Byte
The counter register (T4CNTH) contains the upper 8-bit of the counter value. It must
be read only when the timer is disabled (T4ENA = 0). Due to the
asynchronous implementation it can result in unpredictable read values if
ignored.
Name:
T4CNTH
Offset:
0x081
Reset:
0x00
Bit
7
6
5
4
3
2
1
0
T4CNTH[7:0]
Access
R
R
R
R
R
R
R
R
Reset
0
0
0
0
0
0
0
0
Bits 7:0 – T4CNTH[7:0] Timer4 Counter
Value High Byte
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