46.21 SERCOM SPIx Mode Electrical Specifications

Figure 46-7. SPIx Host Module CPHA = 0 Timing Diagrams
Figure 46-8. SPIx Host Module CPHA = 1 Timing Diagrams
Table 46-27. SERCOM SPIx Module Host Mode Electrical Specifications
AC CHARACTERISTICSStandard Operating Conditions: VDD and VDDIO 2.7V to 5.5V (unless otherwise stated)

Operating temperature

-40°C ≤ TA ≤ +85°C for Industrial

Param. No.SymbolCharacteristics(1)Min.Typ.Max.UnitsConditions
MSP_1FSCKSCK Frequency14.56MHzTransmitter mode, CTRLB.RXEN=0, CLOAD=30pF(MAX)
3.41Full Duplex Transmit and Receive mode,

CLOAD=30pF(MAX)

Loop Back mode with one SPI talking to another SPI on the same MCU.

1/(2*(TMIS+NOTE2_TV)) (2)Full Duplex Transmit and Receive mode,

CLOAD=30pF(MAX).

The max SPI speed of the MCU is partially dependent on the external SPI device performance characteristics.

Faster speeds than the loop back mode above may therefore be possible using the formula.

MSP_3TSCLSCK Output Low Time1/(2*FSCK)ns
MSP_5TSCHSCK Output High Time1/(2*FSCK)ns
MSP_7TSCFSCK & MOSI Output Fall TimeDI_27nsDI_27: Refer to I/O Pin Electrical Specification
MSP_9TSCRSCK & MOSI Output Rise TimeDI_25nsDI_25: Refer to I/O Pin Electrical Specification
MSP_11TMOVMOSI Data Output Valid after SCK34.33nsVDDIO = 2.7V, CLOAD=30pF(MAX)
MSP_13TMOHMOSI hold after SCK8.72ns
MSP_15TMISMISO Setup Time of Data Input to SCK72.96ns
MSP_17TMIHMISO Hold Time of Data Input to SCK12.99ns
MSP_19SPI_GCLKSERCOM SPI input clk freq, GCLK_SERCOMx_COREFCLK_23MHz
Note:
  1. Assumes VDDIO = 2.7V and 30pF external load on all SPIx pins unless otherwise noted.
  2. NOTE2_TV is the client external device data output valid time from clock edge specification.
Figure 46-9. SPIx Client Module CPHA=0 Timing Diagram
Figure 46-10. SPIx Client Module CPHA=1 Timing Diagram
Table 46-28. SERCOM SPIx Module Client Mode Electrical Specifications
AC CHARACTERISTICSStandard Operating Conditions: VDD and VDDIO 2.7V to 5.5V (unless otherwise stated)

Operating temperature

-40°C ≤ TA ≤ +85°C for Industrial

Param. No.SymbolCharacteristics(1)Min.Typ.Max.UnitsConditions
SSP_1FSCKSCK Frequency14.56MHzReceiver mode,

CLOAD=30pF(MAX)

3.41 Full Duplex Transmit and Receive mode,

CLOAD=30pF(MAX)

Loop Back mode with one SPI talking to another SPI on the same MCU.

1/(2*(TSOV+NOTE2_TMIS)) (2)

Full Duplex Transmit and Receive mode,

CLOAD=30pF(MAX).

The max SPI speed of the MCU is partially dependent on the external SPI device performance characteristics.

Faster speeds than the loop back mode above may therefore be possible using the formula.

SSP_3TSCLSCK Output Low Time1/(2*FSCK)ns
SSP_5TSCHSCK Output High Time1/(2*FSCK)ns
SSP_7TSCFSCK & MISO Output Fall TimeDI_27nsDI_27: Refer to I/O Pin Electrical Specification
SSP_9TSCRSCK & MISO Output Rise TimeDI_25nsDI_25: Refer to I/O Pin Electrical Specification
SSP_11TSOVMISO Data Output Valid after SCK77.5nsVDDIO = 2.7V, CLOAD=30pF(MAX)
SSP_13TSOHMISO hold after SCK21.07ns
SSP_15TSISMOSI Setup Time of Data Input to SCK15.67ns
SSP_17TSIHMOSI Hold Time of Data Input to SCK10.36ns
SSP_19TSSSSS setup to SCK (PRELOADEN=1)2*tck_APB + 27.6ns
SS setup to SCK (PRELOADEN=0)27.6ns
SSP_21TSSHSS hold after SCK Client8.59ns
SSP_23SPI_GCLKSERCOM SPI input clk freq, GCLK_SERCOMx_COREFCLK_23MHz
Note:
  1. Assumes VDDIO = 2.7V and 30 pF external load on all SPIx pins unless otherwise noted.
  2. NOTE2_TMIS is the host external device setup time.