46.23 SERCOM I²C Electrical Specifications

Figure 46-11. SERCOM I²C Start/Stop Bits Host Mode Timing Diagrams

Figure 46-12. SERCOM I²C Bus Data Host Mode Timing Diagrams

Table 46-30. SERCOM I²C Host Mode Electrical Specifications
AC CHARACTERISTICS				Standard Operating Conditions: VDD and VDDIO 2.7V to 5.5V (unless otherwise stated) Operating temperature: -40°C ≤ T_A≤ +85°C for Industrial
Param. No.	Symbol	Characteristics		Min.	Max.	Units	Conditions
I2CM_1	TL0:SCL	Host Clock Low Time	100 kHz mode	4.7	—	µs	VDDIO = 5.0V, IPULL-UP = 3 mA, CLOAD = 400 pF
			400 kHz mode	1.3	—	µs	VDDIO = 5.0V, IPULL-UP = 3 mA, CLOAD = 400 pF
			1 MHz mode	0.5	—	µs	VDDIO = 5.0V, IPULL-UP = 20 mA, CLOAD = 550 pF
			3.4 MHz mode	160	—	ns	VDDIO = 5.0V, IPULL-UP = 20 mA, CLOAD = 100 pF
I2CM_3	THI:SCL	Host Clock High Time	100 kHz mode	4	—	µs	VDDIO = 5.0V, IPULL-UP = 3 mA, CLOAD = 400 pF
			400 kHz mode	0.6	—	µs	VDDIO = 5.0V, IPULL-UP = 3 mA, CLOAD = 400 pF
			1 MHz mode	0.26	—	µs	VDDIO = 5.0V, IPULL-UP = 20 mA, CLOAD = 550 pF
			3.4 MHz mode	60	—	ns	VDDIO = 5.0V, IPULL-UP = 20 mA, CLOAD = 100 pF
I2CM_5	TF:SCL	SDAx and SCLx Fall Time	100 kHz mode	—	300	ns	VDDIO = 5.0V, IPULL-UP = 3 mA, CLOAD = 400 pF
			400 kHz mode	—	300	ns	VDDIO = 5.0V, IPULL-UP = 3 mA, CLOAD = 400 pF
			1 MHz mode	—	120	ns	VDDIO = 5.0V, IPULL-UP = 20 mA, CLOAD = 550 pF
			3.4 MHz mode	—	40	ns	VDDIO = 5.0V, IPULL-UP = 20 mA, CLOAD = 100 pF
I2CM_7	TR:SCL	SDAx and SCLx Rise Time	100 kHz mode	—	1000	ns	VDDIO = 5.0V, IPULL-UP = 3 mA, CLOAD = 400 pF
			400 kHz mode	—	300	ns	VDDIO = 5.0V, IPULL-UP = 3 mA, CLOAD = 400 pF
			1 MHz mode	—	120	ns	VDDIO = 5.0V, IPULL-UP = 20 mA, CLOAD = 550 pF
			3.4 MHz mode	—	40	ns	VDDIO = 5.0V, IPULL-UP = 20 mA, CLOAD = 100 pF
I2CM_9	TSU:DAT	Data Setup Time	100 kHz mode	250	—	ns	VDDIO = 5.0V, IPULL-UP = 3 mA, CLOAD = 400 pF
			400 kHz mode	100	—	ns	VDDIO = 5.0V, IPULL-UP = 3 mA, CLOAD = 400 pF
			1 MHz mode	50	—	ns	VDDIO = 5.0V, IPULL-UP = 20 mA, CLOAD = 550 pF
			3.4 MHz mode	10	—	ns	VDDIO = 5.0V, IPULL-UP = 20 mA, CLOAD = 100 pF
I2CM_11	THD:DAT ⁽¹⁾	Data Hold Time	100 kHz mode	300	—	ns	VDDIO = 5.0V, IPULL-UP = 3 mA, CLOAD = 400 pF
			400 kHz mode	300	—	ns	VDDIO = 5.0V, IPULL-UP = 3 mA, CLOAD = 400 pF
			1 MHz mode	300	—	ns	VDDIO = 5.0V, IPULL-UP = 20 mA, CLOAD = 550 pF
			3.4 MHz mode	5	—	ns	VDDIO = 5.0V, IPULL-UP = 20 mA, CLOAD = 100 pF
I2CM_13	TSU:STA	Start Condition Setup Time	100 kHz mode	4.7	—	µs	VDDIO = 5.0V, IPULL-UP = 3 mA, CLOAD = 400 pF
			400 kHz mode	0.6	—	µs	VDDIO = 5.0V, IPULL-UP = 3 mA, CLOAD = 400 pF
			1 MHz mode	0.26	—	µs	VDDIO = 5.0V, IPULL-UP = 20 mA, CLOAD = 550 pF
			3.4 MHz mode	160	—	ns	VDDIO = 5.0V, IPULL-UP = 20 mA, CLOAD = 100 pF
I2CM_15	THD:STA	Start Condition Hold Time	100 kHz mode	4	—	µs	VDDIO = 5.0V, IPULL-UP = 3 mA, CLOAD = 400 pF
			400 kHz mode	0.6	—	µs	VDDIO = 5.0V, IPULL-UP = 3 mA, CLOAD = 400 pF
			1 MHz mode	0.26	—	µs	VDDIO = 5.0V, IPULL-UP = 20 mA, CLOAD = 550 pF
			3.4 MHz mode	160	—	ns	VDDIO = 5.0V, IPULL-UP = 20 mA, CLOAD = 100 pF
I2CM_17	TSU:STO	Stop Condition Setup Time	100 kHz mode	4	—	µs	VDDIO = 5.0V, IPULL-UP = 3 mA, CLOAD = 400 pF
			400 kHz mode	0.6	—	µs	VDDIO = 5.0V, IPULL-UP = 3 mA, CLOAD = 400 pF
			1 MHz mode	0.26	—	µs	VDDIO = 5.0V, IPULL-UP = 20 mA, CLOAD = 550 pF
			3.4 MHz mode	160	—	ns	VDDIO = 5.0V, IPULL-UP = 20 mA, CLOAD = 100 pF
I2CM_21	TAA:SCL	Output Valid from Clock	100 kHz mode	—	3.45	µs	VDDIO = 5.0V, IPULL-UP = 3 mA, CLOAD = 400 pF
			400 kHz mode	—	0.9	µs	VDDIO = 5.0V, IPULL-UP = 3 mA, CLOAD = 400 pF
			1 MHz mode	—	0.45	µs	VDDIO = 5.0V, IPULL-UP = 20 mA, CLOAD = 550 pF
			3.4 MHz mode	—	100	ns	VDDIO = 5.0V, IPULL-UP = 20 mA, CLOAD = 100 pF
I2CM_23	TBF:SDA ⁽²⁾	Bus Free Time	100 kHz mode	4.7	—	µs	VDDIO = 5.0V, IPULL-UP = 3 mA, CLOAD = 400 pF
			400 kHz mode	1.3	—	µs	VDDIO = 5.0V, IPULL-UP = 3 mA, CLOAD = 400 pF
			1 MHz mode	0.5	—	µs	VDDIO = 5.0V, IPULL-UP = 20 mA, CLOAD = 550 pF
			3.4 MHz mode	160	—	ns	VDDIO = 5.0V, IPULL-UP = 20 mA, CLOAD = 100 pF

Note:

Longest delay between data hold timing based on bitfield SDAHOLD of register CTRLA from SERCOM Module, and timing based on four periods of GCLK_SERCOM for 100kHz/400kHz/1MHz mode.
The amount of time the bus must be free before a new transmission can start (STOP condition to START condition).

Figure 46-13. SERCOM I²C Start/Stop Bits Client Mode Timing Diagram

Figure 46-14. SERCOM I²C Bus Data Client Mode Timing Diagrams

Table 46-31. SERCOM I²C Client Mode Electrical Specifications
AC CHARACTERISTICS				Standard Operating Conditions: VDD and VDDIO 2.7V to 5.5V (unless otherwise stated) Operating temperature: -40°C ≤ T_A ≤ +85°C for Industrial
Param. No.	Symbol	Characteristics		Min.	Max.	Units	Conditions
I2CS_1	TL0:SCL	Client Clock Low Time	100 kHz mode	4.7	—	µs	VDDIO = 5.0V, IPULL-UP = 3 mA, CLOAD = 400 pF
			400 kHz mode	1.3	—	µs	VDDIO = 5.0V, IPULL-UP = 3 mA, CLOAD = 400 pF
			1 MHz mode	0.5	—	µs	VDDIO = 5.0V, IPULL-UP = 20 mA, CLOAD = 550 pF
			3.4 MHz mode	160	—	ns	VDDIO = 5.0V, IPULL-UP = 20 mA, CLOAD = 100 pF
I2CS_3	THI:SCL	Client Clock High Time	100 kHz mode	4	—	µs	VDDIO = 5.0V, IPULL-UP = 3 mA, CLOAD = 400 pF
			400 kHz mode	0.6	—	µs	VDDIO = 5.0V, IPULL-UP = 3 mA, CLOAD = 400 pF
			1 MHz mode	0.26	—	µs	VDDIO = 5.0V, IPULL-UP = 20 mA, CLOAD = 550 pF
			3.4 MHz mode	60	—	ns	VDDIO = 5.0V, IPULL-UP = 20 mA, CLOAD = 100 pF
I2CS_5	TF:SCL	SDAx and SCLx Fall Time	100 kHz mode	—	300	ns	VDDIO = 5.0V, IPULL-UP = 3 mA, CLOAD = 400 pF
			400 kHz mode	—	300	ns	VDDIO = 5.0V, IPULL-UP = 3 mA, CLOAD = 400 pF
			1 MHz mode	—	120	ns	VDDIO = 5.0V, IPULL-UP = 20 mA, CLOAD = 550 pF
			3.4 MHz mode	—	40	ns	VDDIO = 5.0V, IPULL-UP = 20 mA, CLOAD = 100 pF
I2CS_7	TR:SCL	SDAx and SCLx Rise Time	100 kHz mode	—	1000	ns	VDDIO = 5.0V, IPULL-UP = 3 mA, CLOAD = 400 pF
			400 kHz mode	—	300	ns	VDDIO = 5.0V, IPULL-UP = 3 mA, CLOAD = 400 pF
			1 MHz mode	—	120	ns	VDDIO = 5.0V, IPULL-UP = 20 mA, CLOAD = 550 pF
			3.4 MHz mode	—	40	ns	VDDIO = 5.0V, IPULL-UP = 20 mA, CLOAD = 100 pF
I2CS_9	TSU:DAT	Data Setup Time	100 kHz mode	250	—	ns	VDDIO = 5.0V, IPULL-UP = 3 mA, CLOAD = 400 pF
			400 kHz mode	100	—	ns	VDDIO = 5.0V, IPULL-UP = 3 mA, CLOAD = 400 pF
			1 MHz mode	50	—	ns	VDDIO = 5.0V, IPULL-UP = 20 mA, CLOAD = 550 pF
			3.4 MHz mode	10	—	ns	VDDIO = 5.0V, IPULL-UP = 20 mA, CLOAD = 100 pF
I2CS_11	THD:DAT ⁽¹⁾	Data Hold Time	100 kHz mode	300	—	ns	VDDIO = 5.0V, IPULL-UP = 3 mA, CLOAD = 400 pF
			400 kHz mode	300	—	ns	VDDIO = 5.0V, IPULL-UP = 3 mA, CLOAD = 400 pF
			1 MHz mode	300	—	ns	VDDIO = 5.0V, IPULL-UP = 20 mA, CLOAD = 550 pF
			3.4 MHz mode	5	—	ns	VDDIO = 5.0V, IPULL-UP = 20 mA, CLOAD = 100 pF
I2CS_13	TSU:STA	Start Condition Setup Time	100 kHz mode	4.7	—	µs	VDDIO = 5.0V, IPULL-UP = 3 mA, CLOAD = 400 pF
			400 kHz mode	0.6	—	µs	VDDIO = 5.0V, IPULL-UP = 3 mA, CLOAD = 400 pF
			1 MHz mode	0.26	—	µs	VDDIO = 5.0V, IPULL-UP = 20 mA, CLOAD = 550 pF
			3.4 MHz mode	160	—	ns	VDDIO = 5.0V, IPULL-UP = 20 mA, CLOAD = 100 pF
I2CS_15	THD:STA	Start Condition Hold Time	100 kHz mode	4	—	µs	VDDIO = 5.0V, IPULL-UP = 3 mA, CLOAD = 400 pF
			400 kHz mode	0.6	—	µs	VDDIO = 5.0V, IPULL-UP = 3 mA, CLOAD = 400 pF
			1 MHz mode	0.26	—	µs	VDDIO = 5.0V, IPULL-UP = 20 mA, CLOAD = 550 pF
			3.4 MHz mode	160	—	ns	VDDIO = 5.0V, IPULL-UP = 20 mA, CLOAD = 100 pF
I2CS_17	TSU:STO	Stop Condition Setup Time	100 kHz mode	4	—	µs	VDDIO = 5.0V, IPULL-UP = 3 mA, CLOAD = 400 pF
			400 kHz mode	0.6	—	µs	VDDIO = 5.0V, IPULL-UP = 3 mA, CLOAD = 400 pF
			1 MHz mode	0.26	—	µs	VDDIO = 5.0V, IPULL-UP = 20 mA, CLOAD = 550 pF
			3.4 MHz mode	160	—	ns	VDDIO = 5.0V, IPULL-UP = 20 mA, CLOAD = 100 pF
I2CS_21	TAA:SCL	Output Valid from Clock	100 kHz mode	—	3.45	µs	VDDIO = 5.0V, IPULL-UP = 3 mA, CLOAD = 400 pF
			400 kHz mode	—	0.9	µs	VDDIO = 5.0V, IPULL-UP = 3 mA, CLOAD = 400 pF
			1 MHz mode	—	0.45	µs	VDDIO = 5.0V, IPULL-UP = 20 mA, CLOAD = 550 pF
			3.4 MHz mode	—	100	ns	VDDIO = 5.0V, IPULL-UP = 20 mA, CLOAD = 100 pF
I2CS_23	TBF:SDA ⁽²⁾	Bus Free Time	100 kHz mode	4.7	—	µs	VDDIO = 5.0V, IPULL-UP = 3 mA, CLOAD = 400 pF
			400 kHz mode	1.3	—	µs	VDDIO = 5.0V, IPULL-UP = 3 mA, CLOAD = 400 pF
			1 MHz mode	0.5	—	µs	VDDIO = 5.0V, IPULL-UP = 20 mA, CLOAD = 550 pF
			3.4 MHz mode	160	—	ns	VDDIO = 5.0V, IPULL-UP = 20 mA, CLOAD = 100 pF

Note:

Longest delay between data hold timing based on bitfield SDAHOLD of register CTRLA from SERCOM Module, and timing based on four periods of GCLK_SERCOM for 100kHz/400kHz/1MHz mode.
The amount of time the bus must be free before a new transmission can start (STOP condition to START condition).

46.23 SERCOM I2C Electrical Specifications

46.23 SERCOM I²C Electrical Specifications