46.1 Operating Frequencies and Thermal Limitations

Table 46-1. Operating Frequency vs. Voltage
CharacteristicVDDIO, VDDIN, AVDD RangeTemp. Range (in °C)Max CPU FrequencyComments
DC_52.7 to 5.5V (1, 2, 3)-40°C to +85°C48 MHzIndustrial
Note:
  1. With BODVDD disabled. If the BODVDD is enabled, refer to parameter REG_47.
  2. The same voltage must be applied to VDDIN and AVDD. This common voltage is referred to as VDD in the data sheet. VDDIO should be lower or equal to VDD.
  3. Some I/Os are in the VDDIO cluster, but can be multiplexed as analog functions (inputs or outputs). In such a case, AVDD is used to power the I/O. Using this configuration may result in an electrical conflict if the VDDIO voltage is lower than VDD = VDDIN = AVDD.
Table 46-2. CPU Thermal Operating Conditions
RatingSymbolMin.Typ.Max.Unit
Operating Ambient Temperature Range TA -4085 °C
Operating Junction Temperature RangeTJ 105°C
Power Dissipation:

Internal Chip Power Dissipation:

PINT = VDD x (IDD –∑ IOHVDD) + VDDIO x (IDDIO –∑ IOHVDDIO)

I/O Pin Power Dissipation:

PI/O = ∑ ({VDD – VOH} x IOHVDD) + ∑ (VOL x IOLVDD) + ∑ ({VDDIO – VOH} x IOHVDDIO) + ∑ (VOL x IOLVDDIO)

PDPINT + PI/OW
Maximum Allowed Power DissipationPDMAX(TJ – TA)/θJAW
Table 46-3. Thermal Packaging Characteristics
CharacteristicsSymbolTyp.Max.Unit
Thermal Resistance, 32-pin TQFP (7x7x1 mm) PackageθJA49.5°C/W
Thermal Resistance, 48-pin TQFP (7x7x1 mm) PackageθJA49.7°C/W
Thermal Resistance, 64-pin TQFP (10x10x1 mm) PackageθJA45.5°C/W
Thermal Resistance, 100-pin TQFP (14x14x1 mm) PackageθJA39.8°C/W
Thermal Resistance, 32-pin VQFN (5x5x1 mm) PackageθJA30.8°C/W
Thermal Resistance, 48-pin VQFN (7x7x0.9 mm) PackageθJA24.8°C/W
Thermal Resistance, 64-pin VQFN (9x9x1 mm) PackageθJA21.2°C/W
Note:
  1. Junction to ambient thermal resistance, Theta-JA (θJA) numbers are achieved by package simulations.