38.7.42 Tx Buffer Transmission Interrupt Enable

Table 38-59. Register Bit Attribute Legend
SymbolDescriptionSymbolDescriptionSymbolDescription
RReadable bitHCCleared by Hardware(Grey cell)Unimplemented
WWritable bitHSSet by HardwareXBit is unknown at Reset
KWrite to clearSSoftware settable bit
Name: TXBTIE
Offset: 0xE0
Reset: 0x00000000
Property: -

Bit 3130292827262524 
 TIE31TIE30TIE29TIE28TIE27TIE26TIE25TIE24 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset 00000000 
Bit 2322212019181716 
 TIE23TIE22TIE21TIE20TIE19TIE18TIE17TIE16 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset 00000000 
Bit 15141312111098 
 TIE15TIE14TIE13TIE12TIE11TIE10TIE9TIE8 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset 00000000 
Bit 76543210 
 TIE7TIE6TIE5TIE4TIE3TIE2TIE1TIE0 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset 00000000 

Bits 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31 – TIEn Transmission Interrupt Enable

Each Tx Buffer has its own Transmission Interrupt Enable bit.
ValueDescription
0Transmission interrupt disabled.
1Transmission interrupt enabled.