38.7.2 Message RAM Configuration

This register is writable only if CCCR.CCE bit (CCCR <1>) is set.
Table 38-19. Register Bit Attribute Legend
SymbolDescriptionSymbolDescriptionSymbolDescription
RReadable bitHCCleared by Hardware(Grey cell)Unimplemented
WWritable bitHSSet by HardwareXBit is unknown at Reset
KWrite to clearSSoftware settable bit
Name: MRCFG
Offset: 0x08
Reset: 0x00000002
Property: Write-restricted

Bit 3130292827262524 
          
Access  
Reset  
Bit 2322212019181716 
 OFFSET[7:0] 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset 00000000 
Bit 15141312111098 
          
Access  
Reset  
Bit 76543210 
          
Access  
Reset  

Bits 23:16 – OFFSET[7:0] Message RAM Base Address Offset

This bitfield value represents the 8 bits offset of the memory base address (bits [23:16]).

The base address is calculated following the formula: Base_Address = 0x20000000+OFFSET << 16.