21.3.59 import_files
(Ask a Question)Description
This Tcl command enables you to import design source files and constraint files.
For importing constraint files, import_files has retired the -pdc
parameter for
SmartFusion 2, IGLOO 2, PolarFire and RTG4. It has been replaced with two new
parameters to match the new design flow. Physical Design Constraints (PDC) Tcl must
now be divided between I/O attribute and pin information from all floorplanning and
timing constraints. These commands must now reside in and be imported as separate
files. The new parameters specify the type of *.pdc file being imported. The path to
the file can be absolute or relative but must be enclosed in curly braces { }.
Use the -convert_EDN_to_HDL
parameter to convert the EDIF file to HDL and then import the converted HDL file.
import_files \
-schematic {file} \
-symbol {file} \
-smartgen_core {file} \
-ccp {file} \
-stimulus {file} \
-hdl_source {file} \
-io_pdc {file} \
-fp_pdc {file} \
-edif {file} \
-sdc {file} \
-crt {file} \
-dcf {file} \
-vcd {file} \
-saif {file} \
-simulation {file} \
-profiles {file} \
-cxf {file} \
-templates {file} \
-ccz {file} \
-modelsim_ini {file} \
-library {file} \
-convert_EDN_to_HDL {true | false}
Arguments
Parameter | Type | Description |
---|---|---|
schematic | string | Specifies the schematics you wish to import into your IDE project. Type parameter must be repeated for each file. |
symbol | string | Specifies the symbols you wish to import into your IDE project. Type parameter must be repeated for each file. |
smartgen_core | string | Specifies the SmartGen Cores you wish to import into your project. Type parameter must be repeated for each file. |
ccp | string | Specifies the Arm® or Cortex®-M1 cores you wish to import into your project. Type parameter must be repeated for each file. |
stimulus | string | Specifies HDL stimulus files you wish to import into your project. Type parameter must be repeated for each file. |
hdl_source_folder | string | Name of the HDL folder you want to import into your project. |
hdl_source | string | Specifies the HDL source files you wish to import into your project. Type parameter must be repeated for each file. |
io_pdc | string | Specifies the PDC file that contains the I/O attribute and pin information. |
fp_pdc | string | Specifies the PDC file that contains the timing and placement information. |
edif | string | Specifies the EDIF files you wish to import into your project. Type parameter must be repeated for each file. This is a mandatory option if you want to convert EDIF to HDL with the -convert_EDN_to_HDL option. This option is not supported in PolarFire. |
sdc | string | Specifies the SDC constraint files you wish to import into your project. Type parameter must be repeated for each file. |
crt | string | Specifies the CRT constraint files you wish to import into your project. Type parameter must be repeated for each file. This option is not supported for PolarFire®, SmartFusion® 2, IGLOO® 2, and RTG4™ families. |
dcf | string | Specifies the DCF constraint files you wish to import into your project. Type parameter must
be repeated for each file. Note: Not supported
for PolarFire, SmartFusion 2, IGLOO 2, and RTG4
families. |
vcd | string | Specifies the VCD constraint files you wish to import into your project. Type parameter must be repeated for each file. |
saif | string | Specifies the SAIF constraint files you wish to import into your project. Type parameter must be repeated for each file. |
simulation | string | Specifies the simulation files you wish to import into your Libero SoC project. Type parameter must be repeated for each file. |
profiles | string | Specifies the profile files you wish to import into your Libero SoC project. Type parameter must be repeated for each file. |
cxf | string | Specifies the CXF (Component) file you wish to import into your Libero SoC project. Type parameter must be repeated for each file. |
templates | string | Specifies the template file you wish to import into your project. |
ccz | string | Specifies the IP Control core file you wish to import into your project. |
modelsim_ini | string | Specifies the ModelSIM INI file that you wish to import into your project. |
library | string | Specifies the library file that you wish to import into your project. If a library file is not available it will be created and added to the library. |
convert_EDN_to_HDL | boolean | The -edif option is mandatory. If the –edif option is not specified or the -convert_EDN_to_HDL is used with another option, EDIF to HDL conversion will fail. |
Error Codes
Error Code | Description |
---|---|
None | Unable to find the file 'a.v'. |
None | Cannot import the 'ProASIC Constraint Files'; your selected family does not support GCF constraints. |
None | Cannot import the 'Criticality Files'; your selected family does not support CRT constraints. |
None | Cannot import the 'Timing Constraint Files'; your selected family does not support DCF constraints. |
None | Cannot import the 'Pin Files'; your selected family does not support PIN constraints. |
None | Error: Parameter is not defined. Valid command formatting is 'import_files [-convert_EDN_to_HDL "TRUE | FALSE"] \ [-hdl_source_folder "Source folder"]* \ [-library "library"] \ [-cxz "file"]* \ [-cxf "file"]* \ [-ccp "file"]* \ [-crt "file"]* \ [-hdl_source "file"]* \ [-stimulus "file"]* \ [-templates "file"]* \ [-modelsim_ini "file"]* \ [-fp_pdc "file"]* \ [-io_pdc "file"]* \ [-sdc "file"]* \ [-ndc "file"]* \ [-net_fdc "file"]* \ [-icf "file"]* \ [-ccz "file"]* \ [-cpz "file"]* \ [-pin "file"]* \ [-gcf "file"]* \ [-saif "file"]* \ [-schematic "file"]* \ [-simulation "file"]* \ [-smartgen_core "file"]* \ [-symbol "file"]* \ [-verilog_netlist "file"]* \ [-dcf "file"]* \ [-profiles "file"]* \ [-vcd "file"]* |
Supported Families
Supported Families |
---|
PolarFire® |
RTG4™ |
SmartFusion® 2 |
IGLOO® 2 |
Example
The command below imports the HDL source files file1.vhd and file2.vhd.
import_files -hdl_source file1.vhd –hdl_source file2.vhd