21.3.100 update_and_run_tool
(Ask a Question)Description
The Tcl command updates and runs the specified tool if there are any modifications
with respect to the source files required by the tool. For tools that support
command files, an optional command file can be supplied through the
-script
parameter.
update_and_run_tool -name {<tool_name >} \
-script {<absolute or relative path to script file>}
-script
is an optional
parameter.Arguments
Parameter | Type | Description |
---|---|---|
name | string | Specified tool name. The following is a list of supported tool names:
|
script | string | Specifies absolute or relative path of the script file. This is an optional parameter. |
Supported tool_names
The following table lists the supported tool names for update_and_run_tool
-name {tool_name}
.
tool_name | Parameter | Description |
---|---|---|
SYNTHESIZE |
-script { | Runs synthesis on your design. |
COMPILE | N/A | Runs Compile with default or configured settings. |
SIM_PRESYNTH | N/A | Runs pre-synthesis simulation with your default simulation tool. |
SIM_POSTSYNTH | N/A | Runs post-synthesis simulation with your default simulation tool. |
SIM_POSTLAYOUT | N/A | Runs the post layout simulation on the simulation tool. |
PLACEROUTE | N/A | Runs Place and Route tool with default or configured settings. |
VERIFYTIMING |
-script { | Runs timing analysis with default settings/configured settings in
script_file . |
VERIFYPOWER |
-script { | Runs power analysis with default settings/configured settings in
script_file . |
GENERATEPROGRAMMINGFILE | N/A | Generates the bit stream used for programming within Libero. This is similar to executing "Generate FPGA Array Data" in the Libero design flow. |
GENERATE_MEMORY_MAP (SmartFusion 2, IGLOO 2 and RTG4 only) | N/A | Exports an XML file in <prj_folder> component/work/<design> /<design>_DataSheet.xml. The file contains information about the root SmartDesign in your project. |
PROGRAMDEVICE | N/A | Programs your device with configured parameters. |
CONFIGURE_CHAIN |
-script { | Takes a script that contains FlashPro-specific Tcl commands and passes them to FlashPro Express for execution. |
SSNANALYZER |
-script { | Takes a script that contains the Simultaneous Switching Noise (SSN)-specific Tcl commands and passes them to the SSN tool for execution. The SSN is a Libero SoC tool that analyzes and generates a Noise Margin report for I/Os after layout depending on Die ane Package. |
EXPORTNETLIST | N/A | This command exports a .v/.vhd netlist file to the active synthesis implementation folder. |
EXPORTSDF | N/A | This command exports the back annotated files to the designer/impl1 folder. |
GENERATEPROGRAMMINGDATA | N/A | Generates the files needed by generating programming bit stream files. |
GENERATEDEBUGDATA (PolarFire only) | N/A | Generates the files needed by SmartDebug during device debug. |
GENERATE_SPI_FLASH_IMAGE (PolarFire only) | N/A | Generates SPI Flash Image file used for programming SPI FLASH Image within Libero. |
PROGRAM_SPI_FLASH_IMAGE (PolarFire only) | N/A | Programs SPI Flash Image with configured parameters. |
Error Codes
Error Code | Description |
---|---|
None | You must specify the Tcl script to run with the CONFIGURE_CHAIN tool. |
None | You must specify the Tcl script to run with the SMARTDEBUG tool. |
None | PROGRAMDEVICE: No programmer is connected. |
None | SPI Flash Memory is not configured. Use the Configure Design Initialization Data and Memories tool to configure it. |
Supported Families
Supported Families |
---|
PolarFire® |
RTG4™ |
SmartFusion® 2 |
IGLOO® 2 |
Example
update_and_run_tool \
-name {COMPILE}
update_and_run_tool \
-name {VERIFYTIMING} \
-script {./SmartTime.tcl}
# Script file contains SmartTime-specific Tcl commands
update_and_run_tool \
-name {VERIFYPOWER} \
-script {./SmartPower.tcl}
# Script file contains SmartPower-specific Tcl commands
update_and_run_tool \
-name {SSNANALYZER}
-script {<full_path>/ssn.tcl}
# Script file contains the SSN-specific Tcl commands
tool_name
corresponds to the name of the tool in Libero SoC.Invoking some tools will cause Libero SoC to automatically run some upstream tools in the design flow. For example, invoking Place and Route will invoke Synthesis (if not already run) before it runs Place and Route.