18.3.18 CIC Channel x Input Register
Note:
- Writes to this register will
be ignored when INSRC(CICCON1[31]) =
0.
Legend: HC = bit is Cleared by Hardware; HS = bit is Set by Hardware; S = bit
can be Set only; R = Readable bit; W = Writable bit; U = Unimplemented bit, read as
'0'; -n = Value at POR; '1' = bit is set;
'0' = bit is cleared; x = bit value is unknown
| Name: | CICxDIN |
| Offset: | 0x001FD4 |
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| Access | |||||||||
| Reset |
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| Access | |||||||||
| Reset |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| DIN[15:8] | |||||||||
| Access | R/W/HC/HS | R/W/HC/HS | R/W/HC/HS | R/W/HC/HS | R/W/HC/HS | R/W/HC/HS | R/W/HC/HS | R/W/HC/HS | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| DIN[7:0] | |||||||||
| Access | R/W/HC/HS | R/W/HC/HS | R/W/HC/HS | R/W/HC/HS | R/W/HC/HS | R/W/HC/HS | R/W/HC/HS | R/W/HC/HS | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
Bits 15:0 – DIN[15:0] CIC Input Register bits
Writing to the DIN register bits sets the input value for channel x.