27.2.14 FDEVOPT Configuration Register

Note:
  1. Fixed pin option is only available for higher pin packages (48-pin, 64-pin and 80-pin).

Legend: PO = Program Once bit; r = Reserved bit

Name: FDEVOPT
Offset: 0xF40

Bit 2322212019181716 
          
Access  
Reset  
Bit 15141312111098 
   SPI2PINDUPPWM SMBENReserved[1:0] 
Access R/POR/POR/POrr 
Reset 11100 
Bit 76543210 
 Reserved ALTI2C3ALTI2C2ALTI2C1Reserved   
Access rR/POR/POR/POr 
Reset 11111 

Bit 13 – SPI2PIN  Main SPI #2 Fast I/O Pad Disable bit(1)

ValueDescription
1

Host SPI2 uses PPS (I/O remap) to make connections with device pins.

0

Host SPI2 uses direct connections with specified device pins.

Bit 12 – DUPPWM DUPPWM bit

ValueDescription
1 PWM4 functions on PPS and fixed pins .
0 PWM4 functions only on fixed pins.

Bit 10 – SMBEN  Select Input Voltage Threshold for I2C Pads to be SMBus 3.0 Compliant bit

ValueDescription
1

Enables SMBus 3.0 input threshold voltage.

0

I2C pad input buffer operation.

Bits 9:8 – Reserved[1:0]  Maintain as ‘0’ bits

Bit 7 – Reserved  Maintain as ‘1’ bit

Bit 5 – ALTI2C3 Alternate I2C3 Pin Mapping bit

ValueDescription
1

Default location for SCL3/SDA3 pins.

0

Alternate location for SCL3/SDA3 pins (ASCL3/ASDA3).

Bit 4 – ALTI2C2 Alternate I2C2 Pin Mapping bit

ValueDescription
1

Default location for SCL2/SDA2 pins.

0

Alternate location for SCL2/SDA2 pins (ASCL2/ASDA2).

Bit 3 – ALTI2C1 Alternate I2C1 Pin Mapping bit

ValueDescription
1

Default location for SCL1/SDA1 pins.

0

Alternate location for SCL1/SDA1 pins (ASCL1/ASDA1).

Bit 2 – Reserved  Maintain as ‘1’ bit