54.4 Revision G - 11/2020
The following updates were added in this revision of the document.
Section | Updates |
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Configuration Summary | Updated the number of ADC channels for the SAM C21 in the SAM C21 Family Features table. |
Processor and Architecture | The bit address and reset value in SRAM Quality of Service. |
DSU | Updated Testing of On-Board Memories MBIST with new test actions in the MBIST Operation Phases table. |
Clock System | Updated the Clock Request Routing image in On-demand, Clock Requests. |
GCLK | Updated the CHEN bit of the PCHCTRLm Register with a new verbiage. |
MCLK |
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OSC32KCTRL | Updated the XOSC32K register with a new verbiage for the STARTUP bit |
RTC | Updated the following registers with new notes: |
DMAC | Updated the DESCADDR Register with 64 as the new number of bits for alignment in the DECADDR bit. |
NVMCTRL | |
EVSYS | |
SERCOM I2C | Updated the 33.4 Signal Description with a new cross reference. |
CAN | Updated the RF1L bit verbiage in the RXF1S Register. |
TC | Updated the following topics with additions to the titles, a new note, and image updates: |
TCC | Updated the CTRLA Register with the addition of the DMAOS bit. |
CCL | Updated this chapter with the following items:
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AC | Updated the COMPCTRL Register with new Descriptions in the tables for the MUXPOS and MUXNEG bits |
45 Electrical Characteristics 85°C (SAM C20/C21 E/G/J) | Updated the following Topics:
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Electrical Characteristics 105°C (SAM C20/C21 E/G/J) | Updated the following Topics:
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Electrical Characteristics 105°C (SAM C20/C21 N) | Updated the following Topics:
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Electrical Characteristics AEC - Q100 Grade 1, 125°C (SAM C20/C21E/G/J) | Updated the following Topics:
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Electrical Characteristics AEC - Q100 Grade 1, 125°C (SAM C20/C21N) | Updated the following Topics:
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Appendix A | Added a new appendix for ISELED parts specification and ordering information. |
Appendix B | Added a new Appendix for SIL 2 Enabled Functional Safety Devices. |