26.4.9 CCPx Capture Buffer Register (Compare Modes Only)

Note:
  1. The CCPxBUF[31:16] bits are only available in 32-Bit Input Capture modes. BUF[31:16] will read as ‘0’ when operating in a 16-Bit Input Capture mode.
  2. CCPxBUF[31:0] will read as ‘0’ for all Timer, Output Compare and PWM Operating modes.
Name: CCPxBUF
Offset: 0x1B20, 0x1B50, 0x1B80, 0x1BB0, 0x1BE0, 0x1C10, 0x1C40, 0x1C70, 0x1CA0

Bit 3130292827262524 
 BUF[31:24] 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset 00000000 
Bit 2322212019181716 
 BUF[23:16] 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset 00000000 
Bit 15141312111098 
 BUF[15:8] 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset 00000000 
Bit 76543210 
 BUF[7:0] 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset 00000000 

Bits 31:0 – BUF[31:0]  Capture Buffer Value bits(1,2)

Indicates the oldest captured time base value in the FIFO.