26.4.8 CCPx Secondary Compare Register (Timer/Compare Modes Only)
Note:
- For operating the module in 32-bit modes, the CCPxRB register contains the upper 16 bits to be compared to the time base. In certain 16-bit modes, the CCPxRB register sets the module output trigger time.
| Name: | CCPxRB |
| Offset: | 0x1B1C, 0x1B4C, 0x1B7C, 0x1BAC, 0x1BDC, 0x1C0C, 0x1C3C, 0x1C6C, 0x1C9C |
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| Access | |||||||||
| Reset |
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| Access | |||||||||
| Reset |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| CMPB[15:8] | |||||||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| CMPB[7:0] | |||||||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |