62.138 GMAC Transmit Queue Segment Allocation Register

Name:	GMAC_TQSA
Offset:	0x5A0
Reset:	0x00000000
Property:	Read/Write


Bit	31	30	29	28	27	26	25	24

Access
Reset


Bit	23	22	21	20	19	18	17	16
		SEGALLOCQ5[2:0]				SEGALLOCQ4[2:0]
Access		R/W	R/W	R/W		R/W	R/W	R/W
Reset		0	0	0		0	0	0


Bit	15	14	13	12	11	10	9	8
		SEGALLOCQ3[2:0]				SEGALLOCQ2[2:0]
Access		R/W	R/W	R/W		R/W	R/W	R/W
Reset		0	0	0		0	0	0


Bit	7	6	5	4	3	2	1	0
		SEGALLOCQ1[2:0]				SEGALLOCQ0[2:0]
Access		R/W	R/W	R/W		R/W	R/W	R/W
Reset		0	0	0		0	0	0

Bits 0:2, 4:6, 8:10, 12:14, 16:18, 20:22 – SEGALLOCQx Segment Allocation for Qx

Number of segments allocated to Qx. This should be entered as a log 2; for example, entering a value of 2 grants 4 segments. A maximum of 16 segments can be granted.