62.131 GMAC Receive Buffer Data Control Register

Name: GMAC_RXBDCTRL
Offset: 0x4D0
Reset: 0x00000000
Property: Read/Write

Bit 3130292827262524 
          
Access  
Reset  
Bit 2322212019181716 
          
Access  
Reset  
Bit 15141312111098 
          
Access  
Reset  
Bit 76543210 
   TSMODE[1:0]     
Access R/WR/W 
Reset 00 

Bits 5:4 – TSMODE[1:0] Receive Descriptor Timestamp Insertion Mode

ValueNameDescription
0 DISABLE Timestamp insertion disable.
1 PTPEVENT Timestamp inserted for PTP Event Frames only.
2 PTPALL Timestamp inserted for All PTP Frames only.
3 ALL Timestamp inserted for All Frames.