62.4 GMAC User Register
| Name: | GMAC_UR |
| Offset: | 0x00C |
| Reset: | 0x00000000 |
| Property: | Read/Write |
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| Access | |||||||||
| Reset |
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| Access | |||||||||
| Reset |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| Access | |||||||||
| Reset |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| HDFLCTLEN | REFCLK | MIM[1:0] | |||||||
| Access | R/W | R/W | R/W | R/W | |||||
| Reset | 0 | 0 | 0 | 0 | |||||
Bit 6 – HDFLCTLEN Half Duplex Flow Control Enable
| Value | Description |
|---|---|
| 0 | Half duplex flow control is disabled. |
| 1 | Half duplex flow control is enabled. |
Bit 2 – REFCLK Source for the GMAC Reference Clock
| Value | Name | Description |
|---|---|---|
| 0 | INTERNAL_GCLK | Selects the GCLK from PMC. |
| 1 | EXTERNAL | Selects the clock from an IO. |
Bits 1:0 – MIM[1:0] Media Interface Mode
| Value | Name | Description |
|---|---|---|
| 0 | MII |
Selects MII mode when GMAC_NCR.MIIONRGMII=1. |
| 1 | RMII |
Selects RMII mode when GMAC_NCR.MIIONRGMII=0. |
| 2 | RGMII | Selects RGMII mode when GMAC_NCR.MIIONRGMII=0. |