62.120 GMAC Quality of Service Configuration Register 0

Name: GMAC_QOS_CFG0
Offset: 0x2E0
Reset: 0x00000000
Property: Read/Write

Bit 3130292827262524 
 Q3_DESCR[3:0]Q3_DATA[3:0] 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset 00000000 
Bit 2322212019181716 
 Q2_DESCR[3:0]Q2_DATA[3:0] 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset 00000000 
Bit 15141312111098 
 Q1_DESCR[3:0]Q1_DATA[3:0] 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset 00000000 
Bit 76543210 
 Q0_DESCR[3:0]Q0_DATA[3:0] 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset 00000000 

Bits 31:28 – Q3_DESCR[3:0] System Bus QoS Attributes for Queue 3 Descriptor Access

Defines the value passed on the system bus QoS attributes when accessing the descriptor of queue 3.

Bits 27:24 – Q3_DATA[3:0] System Bus QoS Attributes for Queue 3 Data Access

Defines the value passed on the system bus QoS attributes when accessing the data of queue 2.

Bits 23:20 – Q2_DESCR[3:0] System Bus QoS Attributes for Queue 2 Descriptor Access

Defines the value passed on the system bus QoS attributes when accessing the descriptor of queue 2.

Bits 19:16 – Q2_DATA[3:0] System Bus QoS Attributes for Queue 2 Data Access

Defines the value passed on the system bus QoS attributes when accessing the data of queue 2.

Bits 15:12 – Q1_DESCR[3:0] System Bus QoS Attributes for Queue 1 Descriptor Access

Defines the value passed on the system bus QoS attributes when accessing the descriptor of queue 1.

Bits 11:8 – Q1_DATA[3:0] System Bus QoS Attributes for Queue 1 Data Access

Defines the value passed on the system bus QoS attributes when accessing the data of queue 1.

Bits 7:4 – Q0_DESCR[3:0] System Bus QoS Attributes for Queue 0 Descriptor Access

Defines the value passed on the system bus QoS attributes when accessing the descriptor of queue 0.

Bits 3:0 – Q0_DATA[3:0] System Bus QoS Attributes for Queue 0 Data Access

Defines the value passed on the system bus QoS attributes when accessing the data of queue 0.