Jump to main content
SmartFusion 2 Microcontroller Subsystem
Search
Home
9
Universal Serial Bus On-The-Go Controller
9.3
How to Use USB OTG Controller
9.3.4
Programmability
Introduction
1
Cortex-M3 Processor Overview and Debug Features
2
Cortex-M3 Processor (Reference Material)
3
Cache Controller
4
Embedded NVM (eNVM) Controllers
5
Embedded SRAM (eSRAM) Controllers
6
AHB Bus Matrix
7
High Performance DMA Controller
8
Peripheral DMA
9
Universal Serial Bus On-The-Go Controller
9.1
Features
9.2
Functional Description
9.3
How to Use USB OTG Controller
9.3.1
Libero Settings for USB OTG Configuration
9.3.2
Software: Firmware, USB Class Specific Code, and Application Code
9.3.3
USB OTG Controller Clocks and Resets
9.3.4
Programmability
9.3.4.1
Memory Map
9.3.4.2
USB OTG Controller Registers Map
9.3.5
Common Registers
9.3.6
Indexed Registers
9.3.7
FIFO Registers
9.3.8
Control and Status Registers (OTG, Dynamic FIFO, and Version)
9.3.9
ULPI and Configuration Registers
9.3.10
Non-Indexed End Point Control/Status Registers
9.3.11
Extended Registers
9.3.12
Direct Memory Access (DMA) Registers
9.3.13
Multipoint Control and Status Registers
9.3.14
Link Power Management Registers
9.3.15
USB System Registers
10
Ethernet MAC
11
CAN Controller
12
MMUART Peripherals
13
Serial Peripheral Interface Controller
14
Inter-Integrated Circuit Peripherals
15
MSS GPIO
16
Communication Block
17
RTC System
18
System Timer
19
Watchdog Timer
20
Reset Controller
21
System Register Block
22
Fabric Interface Interrupt Controller
23
Fabric Interface Controller
24
APB Configuration Interface
25
Error Detection and Correction Controllers
26
Revision History
Microchip FPGA Support
Microchip Information
9.3.4 Programmability
This section discusses the programmability of the USB OTG controller.
