13.2.2.3.4 SPI Data Transfer for Large Flash/EEPROM Devices in Motorola SPI Modes

Serial Flash and EEPROM devices can be driven using Motorola SPI modes. Following is an outline of the interfaces to the required Flash/EEPROM devices that shows how they can be driven using Motorola SPI modes. In each of these modes, the SPI controller is configured as a master with the slave select line connected to the chip select of the memory device.

Devices Requiring Data Frame Sizes of Up to 32 Bits

Serial Flash/EEPROM devices, such as the Atmel 25010/020/040, have a data frame size smaller than 32 bits and can be directly driven from SPI mode.

Write Operation for Atmel 25010/020/040 Devices

The following figure shows the write operation timing for Atmel 25010/020/040 devices. The SPI controller selects the devices using the slave select signal. The data frame size is set to 24 bits. The SPI is configured with SPO = 0, SPH = 0. The first byte is the instruction. Bit 5 of the instruction is part of the address (the 9th bit as required by the Atmel part). Bits 8-15 form a byte address. The residual 8 bits correspond to the data to be written.

Figure 13-8. Write Operation Timing
Important: The first byte contains the opcode that defines the operations to be performed. The opcode also contains address bit A8 in both the READ and WRITE instructions. This is mandated by the Atmel device.

Read Operation for Atmel 25010/020/040 Devices

The following figure shows the read operation timing for Atmel 25010/020/040 devices. For the read operation, the data frame size is set to 24 bits and the SPI controller is configured with SPO = 0, SPH = 0. On completing, the least significant byte of the received data frame corresponds to the data read.

Figure 13-9. Read Operation Timing
Important: The first byte contains the opcode that defines the operations to be performed. The opcode also contains address bit A8 in both the read and write instructions. This is mandated by the Atmel device.