4.2.2 Data Retention Time

The following table shows the retention time of the eNVM with respect to the number of programming cycles. The same values are applicable for both commercial and industrial SmartFusion 2 product grades. Refer to IGLOO2 FPGA and SmartFusion2 SoC FPGA Datasheet for more information on Programming cycles and retention time.

Table 4-3. Data Retention Time
Programming Cycles Per eNVM Page	Retention
< 1000	20 years
< 10000	10 years

Important: The eNVM is not prevented from programming, even if a page exceeds the write count threshold. The eNVM Controller generates a flag through Status register.