4.2.4 Theory of Operation

The eNVM AHB Controller supports the following operations:

• Interface from AHBL for read, and writeoperations
• Issues all eNVM commands through AHBL read and write bus operation. The data width to and from AHBL bus is 32 bits, and data to and from eNVM is 64 bits.
• AB can be read directly from AHBL bus.
• eNVMs treated as ROM. AHBL write transactions to eNVM user data array receive errors on HRESP and write will be ignored.
• Page Program command is used to write the NVM user data array.
• AB can be written directly or loaded from the write data buffer (WDBUFF). Data can be written to WDBUFF in byte, half-word or word AHB transfers.
• Data for Page Program comes from WDBUFF or user data previously written into AB.
• Command code in Table 4-6 determines the NVM commands to be issued. The eNVM user data array is treated as ROM, so any program operations must be performed by submitting relevant commands to the controller. Any AHBL writes to NVM user data without a valid NVM command will cause the HRESP signal to be asserted on the AHBL bus. Any data that needs to be written into the NVM user array must be uploaded first to the WDBUFF and then written into the NVM user array through the assembly buffer. Program operation for the NVM user array occurs at the page boundaries.