2.6.4.5.3 Restrictions

In these instructions:

Rt can be SP or PC only for word loads
Rt2 must not be SP and must not be PC
Rt must be different from Rt2.

When Rt is PC in a word load instruction:

bit[0] of the loaded value must be 1 for correct execution, and a branch occurs to this halfword-aligned address
if the instruction is conditional, it must be the last instruction in the IT block.

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