Jump to main content

SmartFusion 2 Microcontroller Subsystem

Home
2 Cortex-M3 Processor (Reference Material)
2.6 Cortex-M3 Processor Instruction Set
2.6.10 Miscellaneous Instructions
2.6.10.3 DMB
2.6.10.3.3 Condition Flags

Introduction
1 Cortex-M3 Processor Overview and Debug Features
2 Cortex-M3 Processor (Reference Material)
3 Cache Controller
4 Embedded NVM (eNVM) Controllers
5 Embedded SRAM (eSRAM) Controllers
6 AHB Bus Matrix
7 High Performance DMA Controller
8 Peripheral DMA
9 Universal Serial Bus On-The-Go Controller
10 Ethernet MAC
11 CAN Controller
12 MMUART Peripherals
13 Serial Peripheral Interface Controller
14 Inter-Integrated Circuit Peripherals
15 MSS GPIO
16 Communication Block
17 RTC System
18 System Timer
19 Watchdog Timer
20 Reset Controller
21 System Register Block
22 Fabric Interface Interrupt Controller
23 Fabric Interface Controller
24 APB Configuration Interface
25 Error Detection and Correction Controllers
26 Revision History
Microchip FPGA Support
Microchip Information

2.6.10.3.3 Condition Flags

This instruction does not change the flags.

Examples

DMB ; Data Memory Barrier

About

Company

Careers

Contact Us

Media Center

Investor Relations

Corporate Responsibility

Support

Microchip Forums

AVR Freaks

Design Help

Technical Support

Export Control Data

PCNs

Quick Links

microchipDIRECT.com

Microchip University

myMicrochip

Blogs

Reference Designs

Parametric Search

Microchip Technology Inc.

2355 West Chandler Blvd.

Chandler, Arizona, USA

Microchip Twitter

Microchip Weibo

© Copyright 1998-2024 Microchip Technology Inc. All rights reserved. Shanghai ICP Recordal No.09049794

Terms Of Use

Privacy Notice

Legal

Your Privacy Choices California Consumer Privacy Act (CCPA) Opt-Out Icon

California Consumer Privacy Act (CCPA) Opt-Out Icon