37.4.42 I3CxBUSCXT
Note:
- The Controller determines the value of this register by issuing a SETBUSCON CCC.
| Name: | I3CxBUSCXT |
| Address: | 0x0B2, 0x0E5 |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| BUSCXT[7:0] | |||||||||
| Access | R/HS/HC | R/HS/HC | R/HS/HC | R/HS/HC | R/HS/HC | R/HS/HC | R/HS/HC | R/HS/HC | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
Bits 7:0 – BUSCXT[7:0] Bus Context
See public registry at www.mipi.org/MIPI_I3C_bus_context_byte_values_public.html
| Value | Description |
|---|---|
| 0xFF–0xC0 | Vendor Custom – Available for private, per-vendor use (not tracked by MIPI Alliance) |
| 0xBF–0x80 | Other Standards Organizations – Reserved for higher-level protocols defined by other standards developing organizations |
| 0x7F–0x40 | Other MIPI Working Groups – Reserved for higher-level protocols defined by other MIPI Alliance specifications |
| 0x3F–0x01 | MIPI I3C Specification v1.Y Minor Version |
| 0x00 | Reserved |
