37.4.12 I3CxPIE0
Note: Refer to the
I3CxPIR0 register for the corresponding interrupt flag bits.
| Name: | I3CxPIE0 |
| Address: | 0x08E, 0x0C1 |
General Interrupt Enable 0
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| SCIE | PCIE | RSCIE | I2CACKIE | SADRIE | DADRIE | BTFIE | SCCCIE | ||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Bit 7 – SCIE Start Condition Interrupt Enable
| Value | Description |
|---|---|
| 1 | Start Condition Interrupt is enabled |
| 0 | Start Condition Interrupt is disabled |
Bit 6 – PCIE Stop Condition Interrupt Enable
| Value | Description |
|---|---|
| 1 | Stop Condition Interrupt is enabled |
| 0 | Stop Condition Interrupt is disabled |
Bit 5 – RSCIE Restart Condition Interrupt Enable
| Value | Description |
|---|---|
| 1 | Restart Condition Interrupt is enabled |
| 0 | Restart Condition Interrupt is disabled |
Bit 4 – I2CACKIE I2C Acknowledge (ACK) Received Interrupt Enable
| Value | Description |
|---|---|
| 1 | I2C ACK Received Interrupt is enabled |
| 0 | I2C ACK Received Interrupt is disabled |
Bit 3 – SADRIE Static Address Match Interrupt Enable
| Value | Description |
|---|---|
| 1 | Static Address Match Interrupt is enabled |
| 0 | Static Address Match Interrupt is disabled |
Bit 2 – DADRIE Dynamic Address Match Interrupt Enable
| Value | Description |
|---|---|
| 1 | Dynamic Address Match Interrupt is enabled |
| 0 | Dynamic Address Match Interrupt is disabled |
Bit 1 – BTFIE Byte Transfer Finished Interrupt Enable
| Value | Description |
|---|---|
| 1 | Byte Transfer Finished Interrupt is enabled |
| 0 | Byte Transfer Finished Interrupt is disabled |
Bit 0 – SCCCIE Supported CCC Received Interrupt Enable
| Value | Description |
|---|---|
| 1 | Supported CCC Received Interrupt is enabled |
| 0 | Supported CCC Received Interrupt is disabled |
