37.4.24 I3CxEC

Note:

This is a hard-coded read-only bit. This Target module does not support secondary Controller features, so the CREN bit will always read ‘0’.
The value of this read-only register is determined by the Controller after issuing an ENEC or DISEC CCC.
This register follows the definition of ENEC/DISEC Command Byte format as per the MIPI I3C Basic 1.0 Specification.

Name:	I3CxEC
Address:	0x09C, 0x0CF

Event Commands


Bit	7	6	5	4	3	2	1	0
	EC[7:4]				HJEN	EC2	CREN	IBIEN
Access	R/HS/HC	R/HS/HC	R/HS/HC	R/HS/HC	R/HS/HC	R/HS/HC	R/HS/HC	R/HS/HC
Reset	0	0	0	0	1	0	0	1

Bits 7:4 – EC[7:4] MIPI Reserved

Bit 3 – HJEN Hot-Join Requests Status

Value	Description
1	Hot-Join is enabled (ENHJ)
0	Hot-Join is disabled (DISHJ)

Bit 2 – EC2 MIPI Reserved

Bit 1 – CREN Controller Role Request Status⁽¹⁾

Value	Description
1	Controller Role Requests are enabled (ENCR)
0	Controller Role Requests are disabled (DISCR) (Always selected)

Bit 0 – IBIEN In-Band Interrupt Requests Status

Value	Description
1	In-Band Interrupt Requests are enabled (ENINT)
0	In-Band Interrupt Requests are disabled (ENINT)

This is a hard-coded read-only bit. This Target module does not support secondary Controller features, so the CREN bit will always read ‘0’. The value of this read-only register is determined by the Controller after issuing an ENEC or DISEC CCC. This register follows the definition of ENEC/DISEC Command Byte format as per the MIPI I3C Basic 1.0 Specification.