36.7.6 Interrupt Flag Register

Note: Interrupt flags must be cleared and then read back to confirm the clear before exiting the ISR to avoid double interrupts.
Table 36-6. Register Bit Attribute Legend
Symbol Description Symbol Description Symbol Description
R Readable bit HC Cleared by Hardware (Grey cell) Unimplemented
W Writable bit HS Set by Hardware X Bit is unknown at Reset
K Write to clear S Software settable bit — —
Name: INTFLAG
Offset: 0x0014
Reset: 0x0000
Property: PAC Write-Protection

Bit 3130292827262524 
          
Access  
Reset  
Bit 2322212019181716 
          
Access  
Reset  
Bit 15141312111098 
          
Access  
Reset  
Bit 76543210 
   PHYRDYT1MSDMAUSBRESUMEWAKEUP 
Access R/W/HSR/W/HSR/W/HSR/W/HSR/W/HSR/W/HS 
Reset 000000 

Bit 5 – PHYRDY RHY Ready Interrupt Flag

ValueDescription
0 No Change in STATUS.PHYRDY state
1 Change in STATUS.PHYRDY state

Bit 4 – T1MS Timer 1ms Tick Interrupt Flag

ValueDescription
0 1ms Timer has Not Expired
1 1ms Timer has Expired

Bit 3 – DMA DMAINTR Interrupt Flag

ValueDescription
0 No interrupt input is present
1 DMA Interrupt

Bit 2 – USB USBCORE General Interrupts Flag

ValueDescription
0 No interrupt input is present status
1 General Interrupt

Bit 1 – RESUME Resume Detected Flag

Note: Set to one when USB is in Suspend Mode and a Remote Device asserts a “K” state on the USB bus.
ValueDescription
0 No Resume Activity Detected or not in Suspend State
1 Resume from Suspend Detected

Bit 0 – WAKEUP USB Activity Detected while in USB Suspend

Note: This bit can be used to wake the device from Standby.
ValueDescription
0 No Activity Detected or not in Suspend State
1 Activity Detected while USB in Suspend