36.7.21 USB TX/RX FIFO Size Register
FIFOSIZE is a Read-Only register that returns the sizes of the FIFOs associated with the selected additional TX/Rx endpoints. The lower nibble encodes the size of the selected TX endpoint FIFO; the upper nibble encodes the size of the selected Rx endpoint FIFO. Values of 3 – 13 correspond to a FIFO size of 2n bytes (8 – 8192 bytes). If an endpoint has not been configured, a value of 0 will be displayed. Where the TX and Rx endpoints share the same FIFO, the Rx FIFO size will be encoded as 0xF.
| Symbol | Description | Symbol | Description | Symbol | Description |
|---|---|---|---|---|---|
| R | Readable bit | HC | Cleared by Hardware | (Grey cell) | Unimplemented |
| W | Writable bit | HS | Set by Hardware | X | Bit is unknown at Reset |
| K | Write to clear | S | Software settable bit | — | — |
| Name: | FIFOSIZE |
| Offset: | 0x101F |
| Reset: | 0x0000 |
| Property: | PAC Write-Protection |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| RXFIFOSIZE[3:0] | TXFIFOSIZE[3:0] | ||||||||
| Access | R | R | R | R | R | R | R | R | |
| Reset | 0 | 0 | 0 | x | 0 | 0 | 0 | x | |
Bits 7:4 – RXFIFOSIZE[3:0] Receive FIFO Size bits
This register only has this interpretation when dynamic sizing is not selected. It is not valid where dynamic FIFO sizing is used.
| Value | Description |
|---|---|
| 1111 | Reserved |
| 1110 | Reserved |
| 1101 | 8192 bytes |
| 1100 | 4096 bytes |
| 0011 | 8 bytes |
| 0010 | Reserved |
| 0001 | Reserved |
| 0000 | Reserved or endpoint has not been configured |
Bits 3:0 – TXFIFOSIZE[3:0] Transmit FIFO Size bits
This register only has this interpretation when dynamic sizing is not selected. It is not valid where dynamic FIFO sizing is used.
| Value | Description |
|---|---|
| 1111 | Reserved |
| 1110 | Reserved |
| 1101 | 8192 bytes |
| 1100 | 4096 bytes |
| 0011 | 8 bytes |
| 0010 | Reserved |
| 0001 | Reserved |
| 0000 | Reserved or endpoint has not been configured |