36.7.47 USB LPM Interrupts Enable Register

Table 36-47. Register Bit Attribute Legend
Symbol Description Symbol Description Symbol Description
R Readable bit HC Cleared by Hardware (Grey cell) Unimplemented
W Writable bit HS Set by Hardware X Bit is unknown at Reset
K Write to clear S Software settable bit
Name: LPMINTREN
Offset: 0x1363
Reset: 0x0000
Property: PAC Write-Protection

Bit 76543210 
   LPMERRENLPMRESENLPMNCENLPMACKENLPMNYENLPMSTEN 
Access R/WR/WR/WR/WR/WR/W 
Reset 000000 

Bit 5 – LPMERREN LPM Error Interrupt Enable bit

Device Mode only bit. Unimplemented in Host mode.

ValueDescription
0 LPMERR interrupt is disabled
1 LPMERR interrupt is enabled

Bit 4 – LPMRESEN LPM Resume Interrupt Enable bit

ValueDescription
0 LPMRES interrupt is disabled
1 LPMRES interrupt is enabled

Bit 3 – LPMNCEN LPM Not Complete Interrupt Enable bit

ValueDescription
0 Disable the LPMNC Interrupt
1 Enable the LPMNC Interrupt

Bit 2 – LPMACKEN LPM ACK Interrupt Enable bit

ValueDescription
0 Disable the LPMACK Interrupt
1 Enable the LPMACK Interrupt

Bit 1 – LPMNYEN LPM NYET Interrupt Enable bit

ValueDescription
0 Disable the LPMNYET Interrupt
1 Enable the LPMNYET Interrupt

Bit 0 – LPMSTEN LPM Stall Interrupt Enable bit

ValueDescription
0 Disable the LPMST Interrupt
1 Enable the LPMST Interrupt