11.2.32 CANx Bus Diagnostics Register 1 High


Bit	15	14	13	12	11	10	9	8
	DLCMM	ESI	DCRCERR	DSTUFERR	DFORMERR		DBIT1ERR	DBIT0ERR
Access	R/W	R/W	R/W	R/W	R/W		R/W	R/W
Reset	0	0	0	0	0		0	0


Bit	7	6	5	4	3	2	1	0
	TXBOERR		NCRCERR	NSTUFERR	NFORMERR	NACKERR	NBIT1ERR	NBIT0ERR
Access	R/W		R/W	R/W	R/W	R/W	R/W	R/W
Reset	0		0	0	0	0	0	0

Bit 15 – DLCMM DLC Mismatch bit

During a transmission or reception, the specified DLC is larger than the PLSIZE[2:0] of the FIFO element.

Bit 14 – ESI ESI Flag of a Received CAN FD Message Set bit

Bit 13 – DCRCERR Same as for nominal bit rate

Bit 12 – DSTUFERR Same as for nominal bit rate

Bit 11 – DFORMERR Same as for nominal bit rate

Bit 9 – DBIT1ERR Same as for nominal bit rate

Bit 8 – DBIT0ERR Same as for nominal bit rate

Bit 7 – TXBOERR Device Went to Bus Off bit (and auto-recovered)

Bit 5 – NCRCERR Received Message with CRC Incorrect Checksum bit

The CRC checksum of a received message was incorrect. The CRC of an incoming message does not match with the CRC calculated from the received data.

Bit 4 – NSTUFERR Received Message with Illegal Sequence bit

More than five equal bits in a sequence have occurred in a part of a received message where this is not allowed.

Bit 3 – NFORMERR Received Frame Fixed Format bit

A fixed format part of a received frame has the wrong format.

Bit 2 – NACKERR Transmitted Message Not Acknowledged bit

Transmitted message was not Acknowledged.

Bit 1 – NBIT1ERR Transmitted Message Recessive Level bit

During the transmission of a message (with the exception of the arbitration field), the device wanted to send a recessive level (bit of logical value ‘1’), but the monitored bus value was dominant.

Bit 0 – NBIT0ERR Transmitted Message Dominant Level bit

During the transmission of a message (or Acknowledge bit, active error flag or overload flag), the device wanted to send a dominant level (data or identifier bit of logical value ‘0’), but the monitored bus value was recessive. During bus-off recovery, this status is set each time a sequence of 11 recessive bits has been monitored. This enables the CPU to monitor the progress of the bus-off recovery sequence, indicating the bus is not stuck at dominant or continuously disturbed.

Name:	CxBDIAG1H
Offset:	0x5BE, 0x6FE