49.10 I/O Pin Electrical Specifications

Table 49-14. I/O Pin Electrical Specifications ⁽¹⁾
DC CHARACTERISTICS			Standard Operating Conditions: VDD = AVDD = 1.62V to 3.63V (unless otherwise stated) Operating temperature: -40°C ≤ T_A ≤ +85°C for Industrial
Param. No.	Symbol	Characteristics	Min.	Typ.	Max.	Units	Conditions
DI_1	VIL	Input Low Voltage I/O Pins	VSS AVSS	—	0.2 VDD 0.2 AVDD	V	—
DI_3	VIH	Input High Voltage	0.7 VDD 0.7 AVDD	—	VDD AVDD	V	—
DI_5	VOL ⁽⁵⁾	Output Voltage Low (Normal Pins) (Low Drive Strength, DRVSTR=0)	—	—	0.4	V	VDD/AVDD < 3.0V @ I_OL= 1.5 mA
DI_5A		Output Voltage Low (Normal Pins) (Low Drive Strength, DRVSTR=0)	—	—			VDD/AVDD ≥ 3.0V @ I_OL= 2 mA
DI_6		Output Voltage Low (Normal Pins) (High Drive Strength, DRVSTR=1)	—	—			VDD/AVDD < 3.0V @ I_OL= 2.5 mA
DI_6A		Output Voltage Low (Normal Pins) (High Drive Strength, DRVSTR=1)	—	—			VDD/AVDD ≥ 3.0V @ I_OL= 3 mA
DI_7		Output Voltage Low (High Sink Pins) (Low Drive Strength, DRVSTR=0)	—	—			VDD/AVDD < 3.0V @ I_OL= 2.5 mA
DI_7A		Output Voltage Low (High Sink Pins) (Low Drive Strength, DRVSTR=0)	—	—			VDD/AVDD ≥ 3.0V @ I_OL= 3.5 mA
DI_8		Output Voltage Low (High Sink Pins) (High Drive Strength, DRVSTR=1)	—	—			VDD/AVDD < 3.0V @ I_OL= 4 mA
DI_8A		Output Voltage Low (High Sink Pins) (High Drive Strength, DRVSTR=1)	—	—			VDD/AVDD ≥ 3.0V @ I_OL= 6 mA
DI_9	VOH ⁽⁵⁾	Output Voltage High (Normal Pins) (Low Drive Strength, DRVSTR=0)	0.72 VDD 0.72 AVDD	—	—	V	VDD/AVDD < 3.0V @ I_OH= 1 mA
DI_9A		Output Voltage High (Normal Pins) (Low Drive Strength, DRVSTR=0)		—	—		VDD/AVDD ≥ 3.0V @ I_OH= 4 mA
DI_10		Output Voltage High (Normal Pins) (High Drive Strength, DRVSTR=1)		—	—		VDD/AVDD < 3.0V @ I_OH= 2 mA
DI_10A		Output Voltage High (Normal Pins) (High Drive Strength, DRVSTR=1)		—	—		VDD/AVDD ≥ 3.0V @ I_OH= 7 mA
DI_11		Output Voltage High (High Sink Pins) (Low Drive Strength, DRVSTR=0)		—	—		VDD/AVDD < 3.0V @ I_OH= 2 mA
DI_11A		Output Voltage High (High Sink Pins) (Low Drive Strength, DRVSTR=0)		—	—		VDD/AVDD ≥ 3.0V @ I_OH= 7.5 mA
DI_12		Output Voltage High (High Sink Pins) (High Drive Strength, DRVSTR=1)		—	—		VDD/AVDD < 3.0V @ I_OH= 4 mA
DI_12A		Output Voltage High (High Sink Pins) (High Drive Strength, DRVSTR=1)		—	—		VDD/AVDD ≥ 3.0V @ I_OH= 13 mA
DI_13	I_IL	Input pin leakage current	-1	—	1	µA	VSS ≤ VPIN ≤ VDD/AVDD(max) (VPIN = Voltage present on Pin)
DI_15	R_PDWN	Internal Pull-Down (DIR=OUT=0, PULLEN=1)	20	—	63	kΩ	—
DI_17	R_PUP	Internal Pull-Up (DIR=0, OUT=PULLEN=1)	20	—	63	kΩ	—
DI_19	I_ICL ^(1,3,4)	Input Low Injection Current	-1	—	—	mA	—
DI_21	I_ICH ^(2,3,4)	Input High Injection Current	—	—	1	mA	—
DI_23	∑IICT	Total Input Injection Current (sum of all I/O and control pins) Absolute value of \| ∑IICT \|	—	—	45	mA	Absolute instantaneous sum of all ± input injection currents from all I/O pins. ( \| IICL \| + \| IICH \| ) ≤ ∑IICT
DI_25	T_RISE ⁽⁵⁾	I/O pin Rise Time (Normal Pins) (Low Drive Strength, DRVSTR=0)	—	—	13	ns	VDD/AVDD(min), C_LOAD=30pF_(MAX)
DI_25A		I/O pin Rise Time (High Sink Pins) (Low Drive Strength, DRVSTR=0)	—	—	6
DI_25B		I/O pin Rise Time (Normal Pins) (High Drive Strength, DRVSTR=1)	—	—	6
DI_25C		I/O pin Rise Time (High Sink Pins) (High Drive Strength, DRVSTR=1)	—	—	4.5
DI_27	T_FALL ⁽⁵⁾	I/O pin Fall Time (Normal Pins) (Low Drive Strength, DRVSTR=0)	—	—	12	ns
DI_27A		I/O pin Fall Time (High Sink Pins) (Low Drive Strength, DRVSTR=0)	—	—	7
DI_27B		I/O pin Fall Time (Normal Pins) (High Drive Strength, DRVSTR=1)	—	—	7
DI_27C		I/O pin Fall Time (High Sink Pins) (High Drive Strength, DRVSTR=1)	—	—	4.5
Note: VIL source < (VSS - 0.3). Characterized but not tested. VIH source > (VDD + 0.3). If the sum of all injection currents are > \| ∑IICT \| it can affect the ADC results by approximately 4 to 6 counts (i.e., VIH Source > (VDD + 0.3) or VIL source < (VSS - 0.3)). Any number and/or combination of I/O pins not excluded under IICL or IICH conditions are permitted provided the “absolute instantaneous” sum of the input injection currents from all pins do not exceed the specified ∑IICT limit. To limit the injection current the user must insert a resistor in series RSERIES, (i.e. RS), between input source voltage and device pin. The resistor value is calculated according to: For negative Input voltages less than (VSS - 0.3): RS ≥ absolute value of \| ((VIL source - (VSS - 0.3)) / IICL) \| For positive input voltages greater than (VDD + 0.3): RS ≥ ((VIH source - (VDD + 0.3))/ IICH) For Vpin voltages >VDD + 0.3 and <VSS - 0.3 then RS = the larger of the values calculated above High Sink I/O pins are: PA08, PA09, PA12, PA13, PA16, PA17, PA22, PA23, PA31, PB12, PB13, PB16, PB17, PB30, PB31.