10.4.15.1.3 Single Clock (CLKB) or Independent Write and Read Clocks (WCLK and RCLK)

The default for Two Port RAM is independent clocks (one each for Write and Read); click the Single clock checkbox to drive CLKA and CLKB with the same clock.

Clock Polarity

Click the up or down arrows to change the active edge of your Write and Read clocks. If you use a single clock you can select on only RWCLK; if you use independent clocks you can select the polarity of both the WCLK and RCLK. The core configurator instantiates inverters to achieve the specified polarity.