9.2.2.1 Analog Select for PORTx Register
| Name: | ANSELx |
| Offset: | 0xE00, 0xE1C, 0xE38, 0xE54, 0xE70 |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| ANSELx[15:8] | |||||||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| ANSELx[7:0] | |||||||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | |
Bits 15:0 – ANSELx[15:0] Analog Select for PORTx bits
| Value | Description |
|---|---|
1 |
Analog input is enabled and digital input is disabled on the PORTx[n] pin |
0 |
Analog input is disabled and digital input is enabled on the PORTx[n] pin |