5.7.1 Nonvolatile Memory (NVM) Control Register

Note:

These bits can only be reset on a POR.
If this bit is set, there will be minimal power savings (I_IDLE), and upon exiting Idle mode, there is a delay (T_VREG) before Flash memory becomes operational.
All other combinations of NVMOP[3:0] are unimplemented.
Execution of the PWRSAV instruction is ignored while any of the NVM operations are in progress.
Two adjacent words on a 4-word boundary are programmed during execution of this operation.

Legend: C = Clearable bit; SO = Settable Only bit

Name:	NVMCON
Offset:	0x8D0


Bit	15	14	13	12	11	10	9	8
	WR	WREN	WRERR	NVMSIDL	SFTSWP	P2ACTIV	RPDF	URERR
Access	R/SO	R/W	R/C	R/W	R/C	R	R/W	R/C
Reset	0	0	0	0	0	0	0	0


Bit	7	6	5	4	3	2	1	0
					NVMOP[3:0]
Access					R/W	R/W	R/W	R/W
Reset					0	0	0	0

Bit 15 – WR Write Control bit⁽¹⁾

Value	Description
`1`	Initiates a Flash memory program or erase operation; the operation is self-timed and the bit is cleared by hardware once the operation is complete
`0`	Program or erase operation is complete and inactive

Bit 14 – WREN Write Enable bit⁽¹⁾

Value	Description
`1`	Enables Flash program/erase operations
`0`	Inhibits Flash program/erase operations

Bit 13 – WRERR Write Sequence Error Flag bit⁽¹⁾

Value	Description
`1`	An improper program or erase sequence attempt, or termination has occurred (bit is set automatically on any set attempt of the WR bit)
`0`	The program or erase operation completed normally

Bit 12 – NVMSIDL NVM Stop in Idle Control bit⁽²⁾

Value	Description
`1`	Flash voltage regulator goes into Standby mode during Idle mode
`0`	Flash voltage regulator is active during Idle mode

Bit 11 – SFTSWP Partition Soft Swap Status bit

Value	Description
`1`	Partitions have been successfully swapped using the `BOOTSWP` instruction (soft swap)
`0`	Awaiting successful partition swap using the `BOOTSWP` instruction or a device Reset will determine the Active Partition based on the FBTSEQ register

Bit 10 – P2ACTIV Partition 2 Active Status bit

Value	Description
`1`	Partition 2 Flash is mapped into the active region
`0`	Partition 1 Flash is mapped into the active region

Bit 9 – RPDF Row Programming Data Format bit

Value	Description
`1`	Row data to be stored in RAM are in compressed format
`0`	Row data to be stored in RAM are in uncompressed format

Bit 8 – URERR Row Programming Data Underrun Error bit

Value	Description
`1`	Indicates row programming operation has been terminated
`0`	No data underrun error is detected

Bits 3:0 – NVMOP[3:0] NVM Operation Select bits^(1,3,4)

Value	Description
`1111`	Reserved
`1110`	User memory bulk erase operation
`1101`	Reserved
`1100`	Reserved
`1011`	Reserved
`1010`	Reserved
`1001`	Reserved
`1000`	Boot mode (FBOOT) double-word program operation
`0111`	Reserved
`0101`	Reserved
`0100`	Inactive Partition memory erase operation
`0011`	Memory page erase operation
`0010`	Memory row program operation
`0001`	Memory double-word operation⁽⁵⁾
`0000`	Reserved

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