3.5.31 CPU W Register Context Status Register
| Name: | CTXTSTAT |
| Offset: | 0x5A |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| CCTXI[2:0] | |||||||||
| Access | R | R | R | ||||||
| Reset | 0 | 0 | 0 | ||||||
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| MCTXI[2:0] | |||||||||
| Access | R | R | R | ||||||
| Reset | 0 | 0 | 0 | ||||||
Bits 10:8 – CCTXI[2:0] Current (W Register) Context Identifier bits
| Value | Description |
|---|---|
111 |
Reserved |
| . . . | |
100 |
Alternate Working Register Set 4 is currently in use |
011 |
Alternate Working Register Set 3 is currently in use |
010 |
Alternate Working Register Set 2 is currently in use |
001 |
Alternate Working Register Set 1 is currently in use |
000 |
Default register set is currently in use |
Bits 2:0 – MCTXI[2:0] Manual (W Register) Context Identifier bits
| Value | Description |
|---|---|
111 |
Reserved |
| . . . | |
100 |
Alternate Working Register Set 4 was most recently manually selected |
011 |
Alternate Working Register Set 3 was most recently manually selected |
010 |
Alternate Working Register Set 2 was most recently manually selected |
001 |
Alternate Working Register Set 1 was most recently manually selected |
000 |
Default register set was most recently manually selected |