3.5.26 X AGU Bit Reversal Addressing Control Register
| Name: | XBREV |
| Offset: | 0x50 |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| BREN | XB[14:8] | ||||||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 0 | x | x | x | x | x | x | x | |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| XB[7:0] | |||||||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | x | x | x | x | x | x | x | x | |
Bit 15 – BREN Bit-Reversed Addressing (X AGU) Enable bit
| Value | Description |
|---|---|
| 1 | Bit-Reversed Addressing enabled |
| 0 | Bit-Reversed Addressing disabled |
