11.2.17 CAN2 Message Memory Base Address Register Low
Note:
- Bits [1:0] are ‘
0’ to make base address location 32-bit word-aligned.
| Name: | C2FIFOBAL |
| Offset: | 0x5CC |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| FIFOBA[15:8] | |||||||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| FIFOBA[7:0] | |||||||||
| Access | R | R | R | R | R | R | R | R | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
Bits 15:8 – FIFOBA[15:8] Message Memory Base Address bits
Defines the base address for the transmit event FIFO followed by the message objects.