11.2.57 CAN Transmit Attempt Interrupt Status Register Low

Note:

CxTXATIFL: FIFO: TFATIFx (flag needs to be cleared in the FIFO register).
TFATIF0 is for the Transmit Queue.

Name:	CxTXATIFL
Offset:	0x05AC, 0x6EC


Bit	15	14	13	12	11	10	9	8
	TFATIF[15:8]
Access	R	R	R	R	R	R	R	R
Reset	0	0	0	0	0	0	0	0


Bit	7	6	5	4	3	2	1	0
	TFATIF[7:0]
Access	R	R	R	R	R	R	R	R
Reset	0	0	0	0	0	0	0	0

Bits 15:8 – TFATIF[15:8] Unimplemented⁽¹⁾

Bits 7:0 – TFATIF[7:0] Transmit FIFO/TXQ Attempt Interrupt Pending bits^(1,2)

Value	Description
`1`	Interrupt is pending
`0`	Interrupt is not pending

DS70005452D

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