15.4.30 ANSELG
Name: | ANSELG |
Offset: | 0xEBC |
Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
ANSELG7 | ANSELG6 | ANSELG4 | ANSELG3 | ANSELG2 | ANSELG1 | ANSELG0 | |||
Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | ||
Reset | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
Bits 6, 7 – ANSELGn Analog Select on Pins RG[6:7]
Value | Description |
---|---|
1 | Digital Input buffers are disabled. |
0 | ST and TTL input buffers are enabled |
Bits 0, 1, 2, 3, 4 – ANSELGn Analog Select on Pins RG[4:0]
Value | Description |
---|---|
1 | Digital Input buffers are disabled. |
0 | ST and TTL input buffers are enabled |