15.4.61 INLVLG

Input Level Control Register
Name: INLVLG
Offset: 0xEB8

Bit 76543210 
 INLVLG7INLVLG6INLVLG5INLVLG4INLVLG3INLVLG2INLVLG1INLVLG0 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset 11111111 

Bits 0, 1, 2, 3, 4, 5, 6, 7 – INLVLGn Input Level Select on Pins Rx[7:0], respectively

Note: The state of INLVLG5 is ignored when MCLRE = 1.
ValueDescription
1 ST input used for port reads and interrupt-on-change
0 TTL input used for port reads and interrupt-on-change