46.19 ADC

Table 46-25. ADC Accuracy Specifications
Operating Conditions: V_DD = 3.0V T_A = 25°C V_ADCREF = 3.0V f_{CLK_ADC} = 500 kHz
Symbol	Description	Min.	Typ. ✝	Max.	Units	Conditions
N_R	Resolution	-	-	10	bit
E_INL	Integral nonlinearity error	-	0.1	-	LSb
E_DNL	Differential nonlinearity error⁽¹⁾	-	0.1	-	LSb
E_OFF	Offset error	-	0.5	-	LSb
E_GAIN	Gain error	-	0.2	-	LSb
E_ABS	Absolute error	-	0.8	-	LSb
V_ADCREF *	ADC reference voltage	1	-	V_DD	V
V_AIN	Full-scale range	GND	-	V_ADCREF	V
Z_AIN	Recommended impedance of ADC input voltage source	-	<10	-	kΩ
R_VREFA	ADC voltage reference ladder resistance⁽²⁾	-	50	-	kΩ
E_VDD/10	V_DD/10 divider (VDDDIV10/VDDIO2DIV10) accuracy	-	±10	-	%	Measured with ADC using on-chip internal reference
✝ Unless otherwise specified, data in the “Typ.” column is at T_A = 25°C and V_DD = 3.0V. These parameters are not tested and are for design guidance only. * These parameters are characterized but not tested in production. Note: The ADC conversion result never decreases with an increase in the input and has no missing codes. This is the resistance seen by the VREFA pin when the external reference is selected.

Table 46-26. ADC Conversion Timing Specifications
Symbol		Min.	Typ. ✝	Max.	Units
T_{CLK_ADC} *	ADC clock period	0.5		8	µs
t_CNV	Conversion time		11.5×T_{CLK_ADC} + 2×T_{CLK_PER}
f_ADC *	Sample rate	8		170	ksps
t_SENSE *	Delay for changing MUXPOS to TEMP		40		µs
t_{ADC_INIT} *	Initialization time		6		µs
✝ Unless otherwise specified, data in the “Typ.” column is at T_A = 25°C and V_DD = 3.0V. These parameters are not tested and are for design guidance only. * These parameters are characterized but not tested in production.