16.4.13 Filter (Secondary Accumulator)
The secondary accumulator is implemented on the last two channels of each ADC as shown in Table 16-6.
| ADC Number | Channel Number | Secondary Register |
|---|---|---|
| 1 | 6 | AD1ACC6 |
| 7 | AD1ACC7 | |
| 2 | 6 | AD2ACC6 |
| 7 | AD2ACC7 | |
| 3 | 6 | AD3ACC6 |
| 7 | AD3ACC7 | |
| 4 | 6 | AD4ACC6 |
| 7 | AD4ACC7 | |
| 5 | 14 | AD5ACC14 |
| 15 | AD5ACC15 |
The secondary accumulator ADnACCx sums the output of the primary accumulator ADnDATAx.
The secondary accumulator is enabled when the ACCRO bit (ADnCHxCON2[31]) is set. If the
ACCRO bit = ‘1’, the ADnDATAx and ADnACCx accumulators are not cleared;
instead, they will roll over as the data are accumulated over many multisample
operations. The accumulators function as a Second Order Cascaded-Integrator-Comb filter
(CIC). Some of the CIC operations (differentiation functions) need to be performed by
the application software as shown in Figure 16-3.