6.2.12 NVM ECC Error Address Register

Name:	NVMECCEADDR
Offset:	0x302C


Bit	31	30	29	28	27	26	25	24

Access
Reset


Bit	23	22	21	20	19	18	17	16
	ADDR[27:20]
Access	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset	0	0	0	0	0	0	0	0


Bit	15	14	13	12	11	10	9	8
	ADDR[19:12]
Access	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset	0	0	0	0	0	0	0	0


Bit	7	6	5	4	3	2	1	0
	ADDR[11:8]
Access	R/W	R/W	R/W	R/W
Reset	0	0	0	0

Bits 23:4 – ADDR[23:4] ECC Address of Read Data bits

These bits register the location of the NVM read data when the SEC or DED bit is set in the NVMECCSTAT register.

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