6.2.2 Nonvolatile Memory Lower Address Register(1)
Note:
- This register is not writable when WR =
1.
Legend: x = Bit is unknown
| Name: | NVMADR |
| Offset: | 0x3004 |
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| Access | |||||||||
| Reset |
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| NVMADR[27:20] | |||||||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| NVMADR[19:12] | |||||||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| NVMADR[11:8] | |||||||||
| Access | R/W | R/W | R/W | R/W | |||||
| Reset | 0 | 0 | 0 | 0 | |||||
Bits 23:4 – NVMADR[23:4] NVM Address Register bits(1)
NVM Address register used to program a Flash word or Flash row or perform a page
erase. During row programming, the address may point to any Flash word within the
Flash row. The row programming always starts at the beginning of the Flash row.
NVMADR [3:0] is hard coded to logic ‘0000’.