10.2.1.1 AHB Engine

The EMAC can be accessed from an AHB system bus using the AHB engine. The AHB engine module is positioned between the AHB system bus and the MAC TX and RX FIFO.

The AHB Engine includes the following modules:

• DMA: Includes logic for the AHB master interface and contains the DMA controller.
• Slave: Includes logic for the AHB slave interface.
• Decoder: Address bus decoder module to divide accesses between MAC core, FIFO, and accesses to the registers within AHB engine.

The AHB engine includes a DMA controller which is used to transmit and receive operations. Both operations compete for the use of the DMA controller. A round-robin priority algorithm is used to arbitrate between the competing requests.

The AHB engine module interfaces with the host system through a 32-bit AHB master and slave ports. The AHB engine module is positioned between the AHB system bus and the FIFO. Registers within the AHB engine provide control and status information concerning these transfers.