33.22.18 PMC Fast Startup Polarity Register

This register can only be written if the WPEN bit is cleared in the PMC Write Protection Mode Register.

Name:	PMC_FSPR
Offset:	0x0074
Reset:	0x00000000
Property:	Read/Write


Bit	31	30	29	28	27	26	25	24

Access
Reset


Bit	23	22	21	20	19	18	17	16

Access
Reset


Bit	15	14	13	12	11	10	9	8
						FSTP10	FSTP9	FSTP8
Access						R/W	R/W	R/W
Reset						0	0	0


Bit	7	6	5	4	3	2	1	0
	FSTP7	FSTP6	FSTP5	FSTP4	FSTP3	FSTP2	FSTP1	FSTP0
Access	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset	0	0	0	0	0	0	0	0

Bit 10 – FSTP10 GMAC Wake-up On LAN Polarity for Fast Start-up

If PMC_FSMR.FSTT10 = 1, FSTP10 must be written to 1.

Bits 2, 3, 4, 5, 6, 7, 8, 9 – FSTPx PIOBU0–7 Pin Polarity for Fast Start-up

Defines the active polarity of the corresponding PIOBUx input. If the corresponding wake-up input is enabled and at the FSTP level, it enables a fast restart signal.

Bit 1 – FSTP1 Security Module Polarity for Fast Start-up

If PMC_FSMR.FSTT1 = 1, FSTP1 must be written to 1.

Bit 0 – FSTP0 WKUP Pin Polarity for Fast Start-up

Defines the active polarity of the wake-up input. If the wake-up input is enabled and at the FSTP level, it enables a fast restart signal.