33.22.26 PMC Peripheral Clock Status Register 1

Name: PMC_PCSR1
Offset: 0x0108
Reset: 0x00000000
Property: Read-only

Bit 3130292827262524 
 PID63PID62PID61PID60PID59PID58PID57PID56 
Access RRRRRRRR 
Reset 00000000 
Bit 2322212019181716 
 PID55PID54PID53PID52PID51PID50PID49PID48 
Access RRRRRRRR 
Reset 00000000 
Bit 15141312111098 
 PID47PID46PID45PID44PID43PID42PID41PID40 
Access RRRRRRRR 
Reset 00000000 
Bit 76543210 
 PID39PID38PID37PID36PID35PID34PID33PID32 
Access RRRRRRRR 
Reset 00000000 

Bits 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31 – PIDx Peripheral Clock x Status

PID32 to PID63 refer to identifiers as defined in the section “Peripheral Identifiers”.
ValueDescription
0

The corresponding peripheral clock is disabled.
1

The corresponding peripheral clock is enabled.